This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]
Other format:	[Raw text]

Re: Expanding instructions with condition codes inter-deps

From: Richard Henderson <rth at redhat dot com>
To: Peter Bigot <bigotp at acm dot org>
Cc: Paul_Koning at dell dot com, paulo at matos-sorge dot com, gcc at gcc dot gnu dot org
Date: Fri, 21 Oct 2011 09:20:27 -0700
Subject: Re: Expanding instructions with condition codes inter-deps
References: <j7h191$hnc$1@dough.gmane.org> <4E9E0775.3020303@redhat.com> <09787EF419216C41A903FD14EE5506DD030CD64EDB@AUSX7MCPC103.AMER.DELL.COM> <CAPOJ94M2XrqM_kG98v1dC1=K2fEkHpuNLSkZBrQyzJ9ncmaQXg@mail.gmail.com>

On 10/21/2011 09:13 AM, Peter Bigot wrote:
> Are there any existing machine descriptions that do model the carry
> flag separately, specifically to model rotate operations that use the
> carry flag as the destination and source for the shifted bit?  Or is
> the best I can do for that is to have the value be an unspec, with a
> use and clobber of the CC register (which currently blows up in
> simplify_subreg, but I'm still experimenting).

I don't believe there are any extant with that behaviour.


r~

References:
- Expanding instructions with condition codes inter-deps
  - From: Paulo J. Matos
- Re: Expanding instructions with condition codes inter-deps
  - From: Richard Henderson
- RE: Expanding instructions with condition codes inter-deps
  - From: Paul_Koning

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]