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Re: Getting DWARF codes from RTX

From: Ian Lance Taylor <iant at google dot com>
To: "Iyer\, Balaji V" <balaji dot v dot iyer at intel dot com>
Cc: "'gcc\ at gcc dot gnu dot org'" <gcc at gcc dot gnu dot org>
Date: Thu, 20 Oct 2011 11:59:30 -0700
Subject: Re: Getting DWARF codes from RTX
References: <2950715866004049A240A2F9BB410E7315FB115EBC@azsmsx502.amr.corp.intel.com> <mcrwrc0mc8p.fsf@dhcp-172-18-216-180.mtv.corp.google.com> <2950715866004049A240A2F9BB410E7315FB115F5C@azsmsx502.amr.corp.intel.com> <mcrlisfmss2.fsf@dhcp-172-18-216-180.mtv.corp.google.com> <2950715866004049A240A2F9BB410E7315FB4D1C93@azsmsx502.amr.corp.intel.com>

"Iyer, Balaji V" <balaji.v.iyer@intel.com> writes:

> BVI> Actually what I want is to have a way to go from the rtx value e.g (REG: SI 1 di) to 0x51

That's just DW_OP_reg0 + DWARF_FRAME_REGNUM (REGNO (rtx)).  Assuming
REGNO (rtx) <= 31.

Ian

References:
- Getting DWARF codes from RTX
  - From: Iyer, Balaji V
- Re: Getting DWARF codes from RTX
  - From: Ian Lance Taylor
- RE: Getting DWARF codes from RTX
  - From: Iyer, Balaji V
- Re: Getting DWARF codes from RTX
  - From: Ian Lance Taylor
- RE: Getting DWARF codes from RTX
  - From: Iyer, Balaji V

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