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Re: Incidents in ARM-NEON-Intrinsics
- From: Julian Brown <julian at codesourcery dot com>
- To: shiotani at rd dot ten dot fujitsu dot com (åèæå)
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 5 Oct 2011 10:30:57 +0100
- Subject: Re: Incidents in ARM-NEON-Intrinsics
- References: <201110050137.AA00897@E88845D72D2344D.rd.ten.fujitsu.com>
On Wed, 05 Oct 2011 10:37:22 +0900
firstname.lastname@example.org (åèæå) wrote:
> Hi, Maintainer,
> I found some incidents in
> Please check the following:
> |18.104.22.168 Comparison (less-than-or-equal-to)
> | uint32x2_t vcle_u32 (uint32x2_t, uint32x2_t)
> | Form of expected instruction(s): vcge.u32 d0, d0, d0
> | uint32x4_t vcleq_f32 (float32x4_t, float32x4_t)
> | Form of expected instruction(s): vcge.f32 q0, q0, q0
> in above "vcge"s may be "vcle" or "vcgt".
This is deliberate I think: the register/register forms of vcle, vclt,
vacle etc. are pseudo-instructions, and assemble to vcge, vcgt, etc.
with the operands reversed (a <= b === b >= a).
Are you seeing incorrect code being generated?