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Re: A question about sched_analyze_insn in sched-deps.c

From: Ian Lance Taylor <iant at google dot com>
To: Revital Eres <revital dot eres at linaro dot org>
Cc: gcc at gcc dot gnu dot org
Date: Wed, 10 Aug 2011 08:56:54 -0700
Subject: Re: A question about sched_analyze_insn in sched-deps.c
References: <CAHz1=dUzgAzbpxGSw1W_Yc1km6YCxj0dahOwOp5VYu3RJ7kNsA@mail.gmail.com>

Revital Eres <revital.eres@linaro.org> writes:

> I appriciate explanation regarding the following piece of code in
> sched_analyze_insn function (sched-deps.c): When handling jump instruction
> dependence edges are created between the jump instruction and memory
> writes and volatile reads and I'm not quite sure the reason why.

Jump instructions can be conditional.  Note the check for whether the
next instruction is a barrier.

Ian

Follow-Ups:
- Re: A question about sched_analyze_insn in sched-deps.c
  - From: Revital Eres

References:
- A question about sched_analyze_insn in sched-deps.c
  - From: Revital Eres

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