Re: How to tell IRA not to generate invalid insn?

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Sun, Jan 16, 2011 at 3:51 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Sun, Jan 16, 2011 at 3:38 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> On Sun, Jan 16, 2011 at 3:31 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>> Hi,
>>>
>>> While working on x32 port, I noticed that match_asm_constraints_1 turns
>>>
>>> (insn 41 58 46 2 y.i:573 (set (reg/f:SI 98)
>>> ? ? ? ?(symbol_ref/f:SI ("*.LC1") [flags 0x2] <string_cst
>>> 0x7f3dc64880f0>)) 48 {*movsi_1_load_x32} (nil))
>>> ...
>>> (insn 42 40 43 7 y.i:573 (set (mem/s/f:SI (plus:DI (reg/f:DI 20 frame)
>>> ? ? ? ? ? ? ? ?(const_int -32 [0xffffffffffffffe0])) [3
>>> <variable>.iov_base+0 S4 A128])
>>> ? ? ? ?(reg/f:SI 98)) 49 {*movsi_1_store_x32} (expr_list:REG_EQUAL
>>> (symbol_ref/f:SI ("*.LC1") [flags 0x2] <string_cst 0x7f3dc64880f0>)
>>> ? ? ? ?(nil)))
>>>
>>> into
>>>
>>> (insn 42 40 43 7 y.i:573 (set (mem/s/f:SI (plus:DI (reg/f:DI 20 frame)
>>> ? ? ? ? ? ? ? ?(const_int -32 [0xffffffffffffffe0])) [3
>>> <variable>.iov_base+0 S4 A128])
>>> ? ? ? ?(reg/f:SI 98)) 49 {*movsi_1_store_x32} (expr_list:REG_EQUAL
>>> (symbol_ref/f:SI ("*.LC1") [flags 0x2] <string_cst 0x7f3dc64880f0>)
>>> ? ? ? ?(nil)))
>>>
>>> I have disabled such pattern for x32. ?Is there a way to tell
>>> match_asm_constraints_1 not to
>>> generate invalid pattern?
>>>
>>
>> Never mind. ?It is something else.
>
> It is IRA. ?Before IRA, I have
>
> (insn 41 58 46 2 y.i:573 (set (reg/f:SI 98)
> ? ? ? ?(symbol_ref/f:SI ("*.LC1") [flags 0x2] <string_cst
> 0x7fe65da510f0>)) 47 {*movsi_1} (nil))
> ...
> (insn 42 40 43 7 y.i:573 (set (mem/s/f:SI (plus:DI (reg/f:DI 20 frame)
> ? ? ? ? ? ? ? ?(const_int -32 [0xffffffffffffffe0])) [3
> <variable>.iov_base+0 S4 A128])
> ? ? ? ?(reg/f:SI 98)) 47 {*movsi_1} (expr_list:REG_EQUAL
> (symbol_ref/f:SI ("*.LC1") [flags 0x2] <string_cst 0x7fe65da510f0>)
> ? ? ? ?(nil)))
>
> IRA turns this into
>
> (insn 42 40 43 7 y.i:573 (set (mem/s/f:SI (plus:DI (reg/f:DI 7 sp)
> ? ? ? ? ? ? ? ?(const_int 4128 [0x1020])) [3 <variable>.iov_base+0 S4 A128])
> ? ? ? ?(symbol_ref/f:SI ("*.LC1") [flags 0x2] <string_cst
> 0x7fe65da510f0>)) 47 {*movsi_1} (expr_list:REG_EQUAL (symbol_ref/f:SI
> ("*.LC1") [flags 0x2] <string_cst 0x7fe65da510f0>)
> ? ? ? ?(nil)))
>
> even if I have
>
> (define_insn "*movsi_1"
> ?[(set (match_operand:SI 0 "nonimmediate_operand"
> ? ? ? ? ? ? ? ? ? ? ? ?"=r,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
> ? ? ? ?(match_operand:SI 1 "general_operand"
> ? ? ? ? ? ? ? ? ? ? ? ?"g ,ri,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r ? ,m "))]
> ?"!(MEM_P (operands[0]) && MEM_P (operands[1]))
> ? && !(TARGET_X32
> ? ? ? ?&& flag_pic
> ? ? ? ?&& MEM_P (operands[0])
> ? ? ? ?&& (GET_CODE (operands[1]) == SYMBOL_REF
> ? ? ? ? ? ?|| GET_CODE (operands[1]) == LABEL_REF))"
>

I found it. It should be:

(define_insn "*movsi_1_x32"
  [(set (match_operand:SI 0 "nonimmediate_operand"
                        "=r,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
        (match_operand:SI 1 "general_operand"
                        "g ,rI,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
  "TARGET_X32 && !(MEM_P (operands[0]) && MEM_P (operands[1]))"

The difference is "rI" vs "ri".


-- 
H.J.