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Re: Reload problems with only one base reg for "base + offset" addressing mode
- From: Denis Chertykov <chertykov at gmail dot com>
- To: redriver jiang <jiang dot redriver at gmail dot com>
- Cc: Ian Lance Taylor <iant at google dot com>, gcc at gcc dot gnu dot org
- Date: Sun, 1 Aug 2010 17:53:46 +0400
- Subject: Re: Reload problems with only one base reg for "base + offset" addressing mode
- References: <AANLkTin69C0-qfmHY_JZReacxhxXv0GPLoOzcbyUQvLq@mail.gmail.com> <mcr4ofufcn1.fsf@google.com> <AANLkTinPyHdoEwwm4oGhnJA_rxVyTg-eUgDWVFwIOAUG@mail.gmail.com> <mcreieufwl9.fsf@google.com> <AANLkTikYUL91ufdnbg=BnK+qW3C-Y344En_9hVr8ydK3@mail.gmail.com> <mcr6303uzx7.fsf@google.com> <AANLkTimPiU_b7drxBjtJJzkUmYFzO6d0BOMrABFOcJ1A@mail.gmail.com>
2010/7/31 redriver jiang <jiang.redriver@gmail.com>:
> Hi,
>
> Seems there are still some exceptions.
>
> During my testing, the compiler complains:
>
> ./os_core.c: In function 'OS_EventTaskWait':
> ./os_core.c:747: error: unable to find a register to spill in class
> 'POINTER_REGS'
> ./os_core.c:747: error: this is the insn:
> (insn 7 6 8 2 ./os_core.c:739 (set (mem/s/f:HI (plus:HI (reg/f:HI 16
> R16 [orig:39 OSTCBCur.39 ] [39])
> Â Â Â Â Â Â Â Â(const_int 13 [0xd])) [11 <variable>.OSTCBEventPtr+0 S2 A8])
> Â Â Â Â(reg/v/f:HI 2 R2 [orig:40 pevent ] [40])) 48 {*movhi} (nil))
> ./os_core.c:747: confused by earlier errors, bailing out
>
>
> I guess that it is caused by that there is only one register "R18" in
> "POINTER_REGS" class.
>
> I have changed "LEGITIMIZE_RELOAD_ADDRESS" several times, but still can't work.
>
> Do I miss some "macro" definition?
>
> Could someone give some direction?
I have a lot of experiments with reloading memory addresses while I
debug AVR port.
Finally I have emulated memory addressing with infinite displacement.
Look carefully at avr.c: out_movhi_r_mr
Denis.