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Re: Question about Machine Description
yazdanbakhsh <amir.yazdanbakhsh@gmail.com> writes:
> I want to change instruction blez to ble. ble compare two registers and jump
> to the target address if the condition is true.
Read the internals manual to understand how operand predicates and
constraints work. See the hundreds of existing examples. Ask if you
have specific questions.
Ian
> Ian Lance Taylor-3 wrote:
>>
>> yazdanbakhsh <amir.yazdanbakhsh@gmail.com> writes:
>>
>>> Please assume I'm working with the MIPS. There is a little difference
>>> between the MIPS and what I'm actually working on it. How can I remove
>>> immediate logical shift right/left from the compiler?
>>> I mean If I want the programmer writes an immediate shift, It is compiled
>>> to
>>> the two instructions:
>>>
>>> sll %2,%2,5
>>>
>>> changed to:
>>>
>>> addi %3,%0,5
>>> sllv %2,%2,%3
>>
>> Find the insn which generates sll. Change the operand constraints and
>> predicates to reject an immediate operand.
>>
>> E.g., in mips.md this is:
>>
>> (define_insn "*<optab><mode>3"
>> [(set (match_operand:GPR 0 "register_operand" "=d")
>> (any_shift:GPR (match_operand:GPR 1 "register_operand" "d")
>> (match_operand:SI 2 "arith_operand" "dI")))]
>> "!TARGET_MIPS16"
>> {
>> if (CONST_INT_P (operands[2]))
>> operands[2] = GEN_INT (INTVAL (operands[2])
>> & (GET_MODE_BITSIZE (<MODE>mode) - 1));
>>
>> return "<d><insn>\t%0,%1,%2";
>> }
>> [(set_attr "type" "shift")
>> (set_attr "mode" "<MODE>")])
>>
>>
>> For operand 2, change the predicate to register_operand and remove the
>> 'I' constraint.
>>
>> Ian
>>
>>
>
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