This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Question about Machine Description


Hi,

Please assume I'm working with the MIPS. There is a little difference
between the MIPS and what I'm actually working on it. How can I remove
immediate logical shift right/left from the compiler?
I mean If I want the programmer writes an immediate shift, It is compiled to
the two instructions:

sll %2,%2,5

changed to:

addi %3,%0,5
sllv %2,%2,%3

thanks in advance

Ian Lance Taylor-3 wrote:
> 
> yazdanbakhsh <amir.yazdanbakhsh@gmail.com> writes:
> 
>> I'm working on my a gcc compiler for my own written processor with the
>> help
>> of SimpleScalar.
>> I want to remove "srav/slav" (immediate arithmetic shift) from the
>> instruction set. I explore ss.md file but I didn't see any define_ins for
>> the mentioned instructions, but they are used in other instruction
>> definitions.
>> It is also exist for addi/addui. Where I can find the definitions of
>> these
>> instructions? I want to force gcc to just use register shift and register
>> add.
> 
> There is no ss.md file in the standard gcc distribution.  If
> SimpleScalar has a gcc port, I don't know anything about it.  So it's
> hard to answer to your question precisely.
> 
> Instructions can come from either a .md file or a .c file in the
> config/CPU directory used for your CPU.  If those instructions are
> appearing in the generated assembler, then they must be in there
> somewhere.
> 
> Ian
> 
> 

-- 
View this message in context: http://old.nabble.com/Question-about-Machine-Description-tp1026428p28439702.html
Sent from the gcc - Dev mailing list archive at Nabble.com.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]