The usage of the "clobber "match_scratch""

[redriver jiang <jiang dot redriver at gmail dot com>]

Hi.

Right now I know confused by the usage of "clobber "match_scratch"".

The scene is as follows:

1.Target cpu is with only a 8 bit ACC register( but I make 16 virtual
registers, for reload problems).

2.For HImode operands, I let them never to goto ACC combined with
other virtual registers.

3.for addhi operations, the ACC reg needs to be the source/destine
register,  and the "addhi" operation needs to be performed by 2 "8 bit
add" insns,

for example:

for virtual register  reg: HI VR0  = reg: HI VR0 + reg: HI VR2

VR0 for low part of reg:HI VR0,
VR1 for high part of reg:HI VR0,
VR2 for low part of reg:HI VR2,
VR3 for high part of reg:HI VR2,

MOV ACC,VR0         <-----------mov VR0 to ACC
ADD ACC, VR2         <-----------ACC= ACC+ VR2
MOV VR0,ACC         <-----------VR0= ACC
MOV ACC, VR1        <-----------mov VR1 to ACC
ADDC ACC, VR3      <-----------ACC= ACC+ VR3
MOV VR1, ACC        <------------VR1= ACC


So, for "addhi" insn pattern, I want to use a temporary register, as :

(define_expand "addhi3"
  [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
	                (plus:HI (match_operand:HI 1 "nonimmediate_operand" "")
		                      (match_operand:HI 2 "general_operand" "")))
	           (clobber (match_scratch:QI ""))])]
  ""
  "")

And I want to let this temporary register to be allocated to the ACC
regisger in "register allocation" phase, so I can use it in

the assembler output as a temporary register ( make GCC treat that
this ACC reg is not usable across this addhi insn )

as:

(define_insn "*addhi3"
  [(set (match_operand:HI 0 "nonimmediate_operand"
       "=Q,v,R,v,b")
	                (plus:HI (match_operand:HI 1 "nonimmediate_operand"
"%0,0,0,0,0")
		                      (match_operand:HI 2 "general_operand"
"v,Q,v,R,i")))
	           (clobber (match_scratch:QI "=l,l,l,l,l"))]
 ""
 "@
   111
   222
   333
   444
   555
 [( set_attr "length" "1,1,2,2,1" )
 ( set_attr "clobberb" "no,no,yes,yes,no" )])

"Q" for a memory with symbol_ref address, "R" for memory operands
which is not fit for "Q"; "v" for virtual regiter, "l" for ACC
register.

But I find that in some cases, after "register allocation" is done and
"reload" is ongoing, GCC generates some new insns for making the insn
letitimate,

such as using "gen_addhi3", but  the "scratch" operand in this insn is
not allocated to ACC register, and complains that the insn is not
recognized.

Such as :

 test3.c:27: error: insn does not satisfy its constraints:
(insn 52 51 32 0 (parallel [
            (set (reg:HI 16 BASE0)
                (plus:HI (reg:HI 16 BASE0)
                    (const_int -2 [0xfffffffe])))
            (clobber (scratch:QI))
        ]) 9 {*addhi3} (nil)
    (expr_list:REG_EQUIV (plus:HI (reg/f:HI 20 BASE2)
            (const_int -2 [0xfffffffe]))
        (nil)))
test3.c:27: internal compiler error: in reload_cse_simplify_operands,
at postreload.c:391

I think I may not understand the usage of "match_scratch" properly,
and I  make the ACC hard register to be clobbered in rtl generation
pass:

(define_expand "addhi3"
  [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
	                (plus:HI (match_operand:HI 1 "nonimmediate_operand" "")
		                      (match_operand:HI 2 "general_operand" "")))
	           (clobber (reg: QI REG_ACC))])]
  ""
  "")

the former problem disappeared.

But I am afraid that this method may have side affects.

Could you help to give comments?

Thanks!

Redriver.