This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Is it possible to port GCC backend to a architecture with very limited hard registers?


Ok. Thanks!

Then I will persuade the guys who develop the MCU to add one or more
base registers to ease the reload problem, and besides, I will add
some virtual registers( who are static "memory".) to hold 16,32 bit
mode variables.Hope these 2 solutions can make better codes. Now I
just begin to build a prototype porting.

2010/3/18 Ian Lance Taylor <iant@google.com>:
> redriver jiang <jiang.redriver@gmail.com> writes:
>
>> Right now I attempts to port the GCC backend to a MCU with very
>> limited hard registers: only one 8 bit ACC reg, one 16 bit base reg
>> for addressing, one stats reg.
>> I searched the GCC backend porting, and seems 68HC1X has the similar
>> scene, but it use many "ram simulated" register. I wonder that if it
>> is possbile to provided thislimited 3 register to GCC bankend, and let
>> all 16bit(HImode), 32bit(SImode) operands spilled to stack.
>
> It should be possible, though it owuld not be easy to resolve all the
> reload issues. ?gcc will not generate particularly good code for such
> a processor; you will see an awful lot of register shuffling.
>
> Ian
>


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]