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> Yeah. The Move Symbol to R0 register is deleted, which is weird.
> And I still can not figure out why. Which means I still need to dig it.
> But I found when I used the gcc-4.0.2 version, the Call insn call the
> function direction
> call the function symbol which is OK.
> I mean how gcc determine to call the function directly with the function symbol
> or move the function symbol ref into a register then call the register.
> Obviously, now the gcc-4.3.0 in my porting is working in the latter one.
>
I found that gcc will choose to call symbol or register according a
TARGET MACRO --
NO_FUNCTION_CSE. Here is the comment in internal document:
Define this macro if it is as good or better to call a constant
function address than to call an address kept in a register.
Now I defined the macro, the bug disappears. But I still need to know
why gcc delete my insn.
the two insns are in two blocks.
MOV R0 #fun ---in BLOCK 2, this insn is deleted by gcc
CALL R0 ---In Block3
in *.176r.greg:
;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(15){ }}
;; lr in 15 [R15]
;; lr use 15 [R15]
;; lr def 0 [R0]
;; live in 15 [R15]
;; live gen 0 [R0]
;; live kill
;; Pred edge ENTRY [100.0%] (fallthru)
(note:HI 4 2 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note:HI 3 4 6 2 NOTE_INSN_FUNCTION_BEG)
(insn:HI 6 3 37 2 movebug.c:8 (set (reg:SI 0 R0)
(const_int 0 [0x0])) 2 {constant_load_si} (expr_list:REG_EQUAL
(const_int 0 [0x0])
(nil)))
(insn 37 6 8 2 movebug.c:8 (set (mem/c:SI (reg/f:SI 15 R15) [2 i+0 S4 A32])
(reg:SI 0 R0)) 8 {store_si} (nil))
(note:HI 8 37 11 2 NOTE_INSN_DELETED)
;; End of basic block 2 -> ( 3)
;; lr out 0 [R0] 15 [R15]
;; live out 0 [R0] 15 [R15]
;; Succ edge 3 [100.0%] (fallthru)
;; Start of basic block ( 3 2) -> 3
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u-1(15){ }}
;; lr in 0 [R0] 15 [R15]
;; lr use 0 [R0] 15 [R15]
;; lr def 0 [R0] 1 [R1] 2 [R2] 3 [R3] 4 [R4] 5 [R5] 6 [R6] 7 [R7] 8
[R8] 9 [R9] 10 [R10] 11 [R11] 12 [R12] 13 [R13] 16 [PC] 17 [LINK] 18
[LINK_S] 19 [STACK] 20 [STACK_S] 21 [LOOP] 22 [LOOP_S] 23 [STATUS] 24
[STATUS_S] 25 [GBR] 26 [GBRCNT] 27 [AMR] 28 [SPARE] 29 [DEBUG]
;; live in 0 [R0] 15 [R15]
;; live gen 4 [R4]
;; live kill 17 [LINK]
;; Pred edge 3 [93.8%] (dfs_back)
;; Pred edge 2 [100.0%] (fallthru)
(code_label:HI 11 8 7 3 2 "" [1 uses])
(note:HI 7 11 38 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn 38 7 10 3 movebug.c:10 (set (reg:SI 4 R4)
(mem/c:SI (reg/f:SI 15 R15) [2 i+0 S4 A32])) 11 {load_si} (nil))
(insn:HI 10 38 39 3 movebug.c:10 (set (reg:SI 4 R4)
(plus:SI (reg:SI 4 R4)
(const_int 1 [0x1]))) 45 {rice_addsi3} (nil))
(insn 39 10 9 3 movebug.c:10 (set (mem/c:SI (reg/f:SI 15 R15) [2 i+0 S4 A32])
(reg:SI 4 R4)) 8 {store_si} (nil))
(call_insn:HI 9 39 40 3 movebug.c:12 (parallel [
(call (mem:SI (reg:SI 0 R0) [0 S4 A32])
(const_int 0 [0x0]))
(clobber (reg:SI 17 LINK))
]) 99 {call} (nil)
(nil))
(insn 40 9 13 3 movebug.c:10 (set (reg:SI 4 R4)
(mem/c:SI (reg/f:SI 15 R15) [2 i+0 S4 A32])) 11 {load_si} (nil))
(jump_insn:HI 13 40 14 3 movebug.c:10 (set (pc)
(if_then_else (ne:SI (reg:SI 4 R4)
(const_int 16 [0x10]))
(label_ref:SI 11)
(pc))) 84 {*insn_bne} (expr_list:REG_BR_PROB (const_int
9375 [0x249f])
(nil)))
;; End of basic block 3 -> ( 3 4)
;; lr out 0 [R0] 15 [R15] 17 [LINK]
;; live out 0 [R0] 15 [R15]
in *.175r.lreg:
;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u0(14){ }u1(15){ }u2(30){ }}
;; lr in 14 [R14] 15 [R15] 30 [AP]
;; lr use 14 [R14] 15 [R15] 30 [AP]
;; lr def 37 42
;; live in 14 [R14] 15 [R15] 30 [AP]
;; live gen 37 42
;; live kill
;; Pred edge ENTRY [100.0%] (fallthru)
(note:HI 4 2 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note:HI 3 4 6 2 NOTE_INSN_FUNCTION_BEG)
(insn:HI 6 3 8 2 movebug.c:8 (set (reg/v:SI 37 [ i ])
(const_int 0 [0x0])) 2 {constant_load_si} (expr_list:REG_EQUAL
(const_int 0 [0x0])
(nil)))
(insn:HI 8 6 11 2 movebug.c:12 (set (reg/f:SI 42)
(symbol_ref:SI ("fun") [flags 0x41] <function_decl 0xb7257a10
fun>)) 15 {symbolic_address_load} (expr_list:REG_EQUIV (symbol_ref:SI
("fun") [flags 0x41] <function_decl 0xb7257a10 fun>)
(nil)))
;; End of basic block 2 -> ( 3)
;; lr out 14 [R14] 15 [R15] 30 [AP] 37 42
;; live out 14 [R14] 15 [R15] 30 [AP] 37 42
;; Succ edge 3 [100.0%] (fallthru)
;; Start of basic block ( 3 2) -> 3
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u3(14){ }u4(15){ }u5(30){ }}
;; lr in 14 [R14] 15 [R15] 30 [AP] 37 42
;; lr use 14 [R14] 15 [R15] 30 [AP] 37 42
;; lr def 0 [R0] 1 [R1] 2 [R2] 3 [R3] 4 [R4] 5 [R5] 6 [R6] 7 [R7] 8
[R8] 9 [R9] 10 [R10] 11 [R11] 12 [R12] 13 [R13] 16 [PC] 17 [LINK] 18
[LINK_S] 19 [STACK] 20 [STACK_S] 21 [LOOP] 22 [LOOP_S] 23 [STATUS] 24
[STATUS_S] 25 [GBR] 26 [GBRCNT] 27 [AMR] 28 [SPARE] 29 [DEBUG] 37
;; live in 14 [R14] 15 [R15] 30 [AP] 37 42
;; live gen 37
;; live kill 17 [LINK]
;; Pred edge 3 [93.8%] (dfs_back)
;; Pred edge 2 [100.0%] (fallthru)
(code_label:HI 11 8 7 3 2 "" [1 uses])
(note:HI 7 11 10 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn:HI 10 7 9 3 movebug.c:10 (set (reg/v:SI 37 [ i ])
(plus:SI (reg/v:SI 37 [ i ])
(const_int 1 [0x1]))) 45 {rice_addsi3} (nil))
(call_insn:HI 9 10 13 3 movebug.c:12 (parallel [
(call (mem:SI (reg/f:SI 42) [0 S4 A32])
(const_int 0 [0x0]))
(clobber (reg:SI 17 LINK))
]) 99 {call} (nil)
(nil))
(jump_insn:HI 13 9 14 3 movebug.c:10 (set (pc)
(if_then_else (ne:SI (reg/v:SI 37 [ i ])
(const_int 16 [0x10]))
(label_ref:SI 11)
(pc))) 84 {*insn_bne} (expr_list:REG_BR_PROB (const_int
9375 [0x249f])
(nil)))
;; End of basic block 3 -> ( 3 4)
;; lr out 14 [R14] 15 [R15] 17 [LINK] 30 [AP] 37 42
;; live out 14 [R14] 15 [R15] 30 [AP] 37 42
those two dump files are attached to this email.
Any advice is appreciated.
Thanks.
Thanks for your guys.
Attachment:
movebug.c.176r.greg
Description: Binary data
Attachment:
movebug.c.175r.lreg
Description: Binary data
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