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Re: Address mode offset spill

daniel tian wrote:
PS: there are 16 general registers in my RISC chip, from R0 to R15.
R14, and R15 are used for FP,SP. R0 register is special.
Every large immediate, larger than 512, must be moved into R0
register, which means that R0 is the only register to load large
immediate.
This is a thorny problem.
But not terribly uncommon.

Do you need to synthesize large constants? ie, what code would you generate to load the value 0x12345 into a register?

If you need to synthesize large constants, do you need any additional scratch registers, or can you do so using just r0?


jeff

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