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Re: Compact regsiter allocation
- From: Ian Lance Taylor <iant at google dot com>
- To: Jamie Prescott <jpresss at yahoo dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Thu, 14 May 2009 20:57:08 -0700
- Subject: Re: Compact regsiter allocation
- References: <firstname.lastname@example.org>
Jamie Prescott <email@example.com> writes:
> The VM I'm retargeting GCC to, has an instruction that allows to store/load multiple,
> a consecutive range of registers, to a memory operand.
> I noticed that sometime the registers allocated by GCC are sparse, and this prevents
> the store/load multiple optimization from happening (I have to issue single push/pop).
> Is it possible in some way to instruct GCC to make the allocation compact?
> So, for example, instead of allocating r8, r10, r12 and r15, allocate r8..r11?
Normally gcc will allocate registers in the order they are listed in
REG_ALLOC_ORDER, which defaults to increasing numeric order. gcc won't
normally allocate register sparsely. That said, it is quite possible
for gcc to allocate a register and then discover that it need not be
allocated. There isn't currently any way to request that gcc tighten up
the register allocation. That would probably require another
optimization pass to consistently rename registers when there is a hole
in the allocation order.