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Compact regsiter allocation
- From: Jamie Prescott <jpresss at yahoo dot com>
- To: gcc at gcc dot gnu dot org
- Date: Thu, 14 May 2009 20:13:59 -0700 (PDT)
- Subject: Compact regsiter allocation
The VM I'm retargeting GCC to, has an instruction that allows to store/load multiple,
a consecutive range of registers, to a memory operand.
I noticed that sometime the registers allocated by GCC are sparse, and this prevents
the store/load multiple optimization from happening (I have to issue single push/pop).
Is it possible in some way to instruct GCC to make the allocation compact?
So, for example, instead of allocating r8, r10, r12 and r15, allocate r8..r11?