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Re: naked zero_extracts longer than a word.
On Mon, May 11, 2009 at 12:25:50PM -0700, Ian Lance Taylor wrote:
> I feel reasonably confident that there will never be a processor which
> supports a bitfield instruction which operates on multiple hard register
> simultaneously. I don't think that is a case we need to worry about.
> (I will now wait for somebody to post an example of such a processor.)
I can't quite do that, but here's a likely scenario: registers which
GCC views as separate but are really combined. For instance, if ARM
NEON supported bitfield insert/extract (which it unsurprisingly does
not), we'd have a problem: the 'qN' registers are two 'dN' registers
concatenated, and GCC only knows about them once.