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Re: naked zero_extracts longer than a word.

Ian Lance Taylor wrote:
> Kenneth Zadeck <> writes:
>> Would those that know, (or even those that are just generally vocal) be
>> willing to support a change rtl.texi for sign_extract (and by
>> implication, zero_extract) from
>> If @var{loc} is in memory, its mode must be a single-byte integer mode.
>> If @var{loc} is in a register, the mode to use is specified by the
>> operand of the @code{insv} or @code{extv} pattern
>> (@pxref{Standard Names}) and is usually a full-word integer mode,
>> which is the default if none is specified.
>> to a version that explicitly prohibits the use of a mode longer than a word?
>> The back ends do not appear to support this anyway.
> I guess the obvious counterexample would be a processor which supported
> vector registers and supported bitfield operations on such registers.  I
> don't know of any such processors.  The restriction would probably be
> fine in practice, but why do you want to make it?

No, actually the question I asked Kenny was not about modes wider than a
word, but about hard registers spanning more than one hard registers.

That would be something like

   (set (reg:SI 0) (zero_extract:SI (reg:DI 2)
                                    (const_int 32) (const_int 16)))

with word_mode == SImode.  Currently DF would mishandle this; Kenny
thought the doc should be changed if this is actually unsupported.


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