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Re: Setting ARM PIC register (Was: RE: GCC 4.5.0 Status Report (2009-05-05))
On Wed, 6 May 2009, Richard Earnshaw wrote:
> > Or like alpha:
> > insert_insn_on_edge (seq, single_succ_edge (ENTRY_BLOCK_PTR));
> > That's not for the PIC load, but should work okay as expand from SSA
> > commits instructions on edges later. That actually seems even nicer
> > IMO, if it works...
> There's already emit_insn_at_entry in cfgrtl.c. Would that work?
Unfortunately not. That one also wants to immediately commit the just
inserted instructions, which doesn't work during the transition phase from
GIMPLE to RTL. But just queuing them should be fine.