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Re: [m32c] IRA reload failures in libstdc++
- From: Joern Rennecke <amylaar at spamcop dot net>
- To: DJ Delorie <dj at redhat dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Tue, 21 Apr 2009 08:09:14 -0400
- Subject: Re: [m32c] IRA reload failures in libstdc++
Any ideas?
This:
Reload 0: reload_in (SI) = (reg/f:SI 25 [ __i1$_M_current ])
A_REGS, RELOAD_FOR_OTHER_ADDRESS (opnum = 0)
reload_in_reg: (reg/f:SI 25 [ __i1$_M_current ])
cannot be satisfied because there is no A_REGS register
acceptable in SImode.
I suggest making reload reload the PSImode subreg instead, and
make the m32c machine description provide for a tertiary
reload so that the value can be loaded & truncated.
Any thoughts on why gcc has so many problems with this chip?
Having BASE_REG_CLASS with only two members is pretty extreme.
Likewise for not being able to reload an address in an integral
mode.
When you labour on keeping this port working, you are on the
bleeding edge of reload limitations.
I remember when DImode additions caused i386 (elf) PIC reload
problems - but compared with m32c, the i386 integer programming
model is compiler-friendly ;-)