Re: question on 16 bit registers with 32 bit pointers

[Dave Korn <dave dot korn dot cygwin at googlemail dot com>]

Michael Meissner wrote:
> On Sat, Apr 11, 2009 at 01:40:57AM +0100, Dave Korn wrote:
>> Stelian Pop wrote:
>> 
>>>>> Do I need to define movsi3(), addsi3() etc. patterns manually or
>>>>> should GCC figure those by itself ?
>>>> Not sure I understand you.  You always need to define movMM3 etc.
>>>> GCC will correctly select between movhi3 and movsi3 based on your
>>>> Pmode macro when handling pointers, but you still need to write the
>>>> patterns.
>>> The thing is that this CPU does not have any real 32 bit registers, or 
>>> instructions to do assignments/additions/etc to 32 bit registers. So
>>> the 32 bit operations (on pointers) need to be emulated using the 16
>>> bit components, and I thought that GCC can do this automatically for me
>>> ...
>> Ah.  In theory GCC should move everything by pieces.  In practice, you
>> have to define mov patterns for SI and DI because rtl-level CSE isn't as
>> smart as it should be.  You can use expanders for these.
> 
> Though if you use expanders that need temporary registers, you may have 
> problems in reload, and need to delve into the mysteries of secondary
> reload. I would imagine that for pointer sized things it is best if you do
> need to implement multiple instructions that you hold off on splitting
> until after reload is completed.

  Yes, you're right about the register vs reload issue; you must condition any
calls to force_reg on !reload in progress / completed.  But I don't think this
is such a problem; reload will only generate movMM instructions based on hard
regs, so you'll only run into secondary reloads if you have complex addressing
modes that need a scratch register to address, won't you?

    cheers,
      DaveK