Re: help for arm avr bfin cris frv h8300 m68k mcore mmix pdp11 rs6000 sh vax

[Paolo Bonzini <bonzini at gnu dot org>]

> /* Immediate shift counts are truncated by the output routines (or was it
>    the assembler?).  Shift counts in a register are truncated by SH.  Note
>    that the native compiler puts too large (> 32) immediate shift counts
>    into a register and shifts by the register, letting the SH decide what
>    to do instead of doing that itself.  */
> /* ??? The library routines in lib1funcs.asm truncate the shift count.
>    However, the SH3 has hardware shifts that do not truncate exactly as gcc
>    expects - the sign bit is significant - so it appears that we need to
>    leave this zero for correct SH3 code.  */

So you have that in the RTL stream we should canonicalize "a << 32" to
"a", but "a << (b & 31)" is not the same as "a << b"?

Also, how is the sign bit is significant?  Does it determine whether the
value is left- or right-shifted?

Finally, is SH2A the same as SH3?

Thanks!

Paolo