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Re: Difference between vec_shl_<vector_mode> and ashl<vector_mode>3
- From: Paolo Bonzini <bonzini at gnu dot org>
- To: Bingfeng Mei <bmei at broadcom dot com>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>, Ian Lance Taylor <iant at google dot com>
- Date: Tue, 10 Feb 2009 16:46:06 +0100
- Subject: Re: Difference between vec_shl_<vector_mode> and ashl<vector_mode>3
- References: <7FB04A5C213E9943A72EE127DB74F0AD49E5D36345@SJEXCHCCR02.corp.ad.broadcom.com>
Bingfeng Mei wrote:
> Hello,
> Could anyone explain to me what is difference between
> vec_shl_<vector_mode> and ashl<vector_mode>3 patterns? It seems to me
> that both shift a vector operand 1 with scalar operand 2. I tried to
> understand some targets' implemenation, e.g., ia64 as follows, and
> cannot grasp their difference. Does the "whole vector shift" of
> vec_shl means treating a vector as a long scalar? Thanks in advance.
vec_shl_<mode> is indeed treating a vector as a long scalar, while
lshr<mode>3 is for SIMD shifts. Only for shifts, the second argument
can be an integer mode specifying that the shift count has to be the
same for all SIMD elements.
Notice that in the vec_shr_<mode> you pasted, the shift is carried out
in DImode
> [(set (match_operand:VECINT 0 "gr_register_operand" "")
> (lshiftrt:DI (match_operand:VECINT 1 "gr_register_operand" "")
> (match_operand:DI 2 "gr_reg_or_6bit_operand" "")))]
> ""
while in the lshr<mode>3 it is carried out in the vector mode:
> [(set (match_operand:VECINT24 0 "gr_register_operand" "=r")
> (lshiftrt:VECINT24
> (match_operand:VECINT24 1 "gr_register_operand" "r")
> (match_operand:DI 2 "gr_reg_or_5bit_operand" "rn")))]
Paolo