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Re: Implementing a restrictive addressing mode for a gcc port
- From: Jim Wilson <wilson at tuliptree dot org>
- To: Mohamed Shafi <shafitvm at gmail dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Mon, 31 Mar 2008 22:11:59 -0700
- Subject: Re: Implementing a restrictive addressing mode for a gcc port
- References: <ba0bd44d0803282340u4fb8bd98r1b0ecc7832778e4e@mail.gmail.com> <47F14C3E.5070808@tuliptree.org> <ba0bd44d0803312118y1ec4e109j1847385a579a26d7@mail.gmail.com>
On Tue, 2008-04-01 at 09:48 +0530, Mohamed Shafi wrote:
> What i did was to have 8 register class with each class having two
> registers, an even register and an odd register then in define expand
> look for the register indirect with offset addressing mode and emit
> gen_store_offset or gen_load_offset pattern if the addressing mode is
> found.
This sounds similar to what I suggested, so it may work.
However, having a separate pattern for certain kinds of loads/stores may
not work. reload doesn't re-recognize an insn while it is fixing it,
hence you need to have a single movsi (or whatever) pattern that can
handle any kind of operand. If you have a movsi pattern that doesn't
accept load/store offset, then probably what will happen is that any fp
+offset addresses generated during reload will get reloaded into a
register, and you may not get very good code. Of course, with your
address register restrictions, there is only one register that can be
used with fp+offset, so you might not get good code for that regardless
of what you do.
Jim