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Re: gcc-4.3.0/ppc32 inline assembly produces bad code


Andreas Schwab wrote:
Till Straumann <strauman@slac.stanford.edu> writes:

asm volatile ("lwz %0, 16(%1)":"=r"(val):"b"(base),"m"(*reg_p));

asm volatile ("lwz%U1%X1 %0, %1":"=r"(val):"m"(*reg_p));
Hmm - that is beyond me. What exactly do %U1 and %X1 mean?
I suspect that %U1 means that operand #1 is to be updated, right?

How am I supposed to know that my version is wrong
(and it used to work with older gccs)? I just followed the manual
which states:

> If your assembler instructions access memory in an unpredictable
>fashion, add `memory' to the list of clobbered registers.  This will
>cause GCC to not keep memory values cached in registers across the
>assembler instruction and not optimize stores or loads to that memory.
>You will also want to add the `volatile' keyword if the memory affected
>is not listed in the inputs or outputs of the `asm', as the `memory'
>clobber does not count as a side-effect of the `asm'.  If you know how
>large the accessed memory is, you can add it as input or output but if
>this is not known, you should add `memory'.  As an example, if you
>access ten bytes of a string, you can use a memory input like:
>
>     {"m"( ({ struct { char x[10]; } *p = (void *)ptr ; *p; }) )}.
>
> Note that in the following example the memory input is necessary,
>otherwise GCC might optimize the store to `x' away:
>     int foo ()
>     {
>       int x = 42;
>       int *y = &x;
>       int result;
>       asm ("magic stuff accessing an 'int' pointed to by '%1'"
>             "=&d" (r) : "a" (y), "m" (*y));
>       return result;
>     }


IMHO my example is pretty close to this...


Also, the manual doesn't say that 'm' can only match
memory addresses with side effects; it says 'a memory
operand is allowed, with any kind of address that the
machine supports in general'.

Thanks

-- Till

Andreas.




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