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Re: gcc-4.3.0/ppc32 inline assembly produces bad code

Andreas Schwab wrote:
Daniel Jacobowitz <> writes:

On Mon, Mar 31, 2008 at 03:06:24PM +0200, Andreas Schwab wrote:
The side effect is carried out by using %U0, which expands to u for a
PRE_{INC,DEC,MODIFY} operand. There is no way to encode that in the
insn operand itself, unlike m68k, for example. The ia64 target has a
similar issue.
OK, so it's possible to get that right.  Still - how many people
writing inline assembly do we think will do so?

This is back to something the S/390 maintainers were working on a few
months ago; in short the useful definition of "m" to GCC is not the
useful one for users, I don't think. Especially when it changes.

There are many pitfalls when you use inline asm. Another example is the
difference between "r" and "b" on powerpc, where you can silently get
bad code if you use "r" when "b" would be needed (in some insns 0 means
constant 0 instead of register 0).
Sure - but that is at least (minimally) documented. One sentence
more in the gcc manual wouldn't hurt though...


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