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Re: ARM gcc generates incorrect code?
"Dave Korn" <dave.korn@artimi.com> writes:
>> #define get_user(x,p) \
>> ({ \
>> register const u8 __user *__p asm("r0") = (p); \
>> register unsigned long __r2 asm("r2"); \
>> register int __e asm("r0"); \
>> __asm__ __volatile__ ( \
>> __asmeq("%0", "r0") __asmeq("%1", "r2") \
>> "bl __get_user_1" \
>> : "=&r" (__e), "=r" (__r2) \
> ^^^^^ '&' means output operand (zero)
> is early-clobber, so cannot share
> a register with any input operand.
Well, GCC-Inline-Assembly-HOWTO.html says "An input operand can be
tied to an earlyclobber operand if its only use as an input occurs
before the early result is written" and it seems it's the case.
Though I'm not sure if it's relevant here.
>> : "0" (__p) \
> ^^^^^^ '0' means forcibly share an input
> operand with operand zero.
>
>> : "lr", "cc"); \
>> x = (u8) __r2; \
>> __e; \
>> })
>
> I think the macro could well be wrong. Do you know why those constraints
> were chosen?
No. The macro is in normal Linux ARM kernel.
--
Krzysztof Halasa