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Re: -mfmovd enabled by default for SH2A but not for SH4
- From: Kaz Kojima <kkojima at rr dot iij4u dot or dot jp>
- To: naveen dot hs at kpitcummins dot com
- Cc: gcc at gcc dot gnu dot org, Prafulla dot Thakare at kpitcummins dot com
- Date: Fri, 22 Feb 2008 21:15:48 +0900 (JST)
- Subject: Re: -mfmovd enabled by default for SH2A but not for SH4
- References: <78DE440C4156CC45A35FDBCBF9B830D701D0B867@sohm.kpit.com>
"Naveen H.S." <firstname.lastname@example.org> wrote:
> The option "-mfmovd" is enabled by default for SH2A which generates
> "fmov.d" instruction by default. However, SH4 and SH4A targets
> generates "fmov.d" instruction only after passing the option "-mfmovd".
fmov.d has a byte order problem in little endian. I guess that
-mfmovd is default on SH2A because SH2A is big endian only,
though I know nothing about the history of SH2A support.
> The following testcase results in address error at "fmov.d" instruction.
I can't reproduce it with my unified tree&sim and couldn't find
any description for 8-byte alignment restriction for double
data on memory in my SH2A manual, though I could be wrong about
Have you got this error on the real SH2A-FPU hardware?