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Re: How to activate instruction scheduling in GCC?
- From: Ian Lance Taylor <iant at google dot com>
- To: petruk_gile <petsbags at gmail dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: 29 Jul 2007 21:36:30 -0700
- Subject: Re: How to activate instruction scheduling in GCC?
- References: <email@example.com>
petruk_gile <firstname.lastname@example.org> writes:
> I'm a pure beginner in GCC, and currently working on a project to implement
> instruction scheduling for a new DSP processor. This processor doesn't have
> pipeline interlock, so the compiler HAVE to schedule the instruction without
> relying on hardware help anymore ....
> The problem is, I'm a very beginner in GCC. I think the scheduling in GCC is
> activated by INSN_SCHEDULING variable (in automatically generated file:
> insn-attr.h), but I don't even know how to activate this variable.
INSN_SCHEDULING will automatically be turned on if you have any
define_insn_reservation clauses in your CPU.md file. See the
"Processor pipeline description" documentation in the gcc internals
That said, the gcc scheduler unfortunately does not work very well for
processors which do not have hardware interlocks. The scheduler will
lay out the instructions more or less optimally. But the scheduler
has no ability to insert nops when they are required to satisfy
I know of two workable approachs. You can either insert the required
nops in the TARGET_MACHINE_DEPENDENT_REORG pass or in the
TARGET_ASM_FUNCTION_PROLOGUE hook. I personally prefer the latter
approach, as it takes effect after all other instruction rearrangement
is complete, but there are existing backends which use the former.
For an example of inserting nops in TARGET_MACHINE_DEPENDENT_REORG,
see the MIPS backend, specifically mips_avoid_hazards. For an example
of inserting nops in TARGET_ASM_FUNCTION_PROLOGUE, see the FRV
backend, specifically frv_pack_insns.