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Re: vcond implementation in altivec
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: "Devang Patel" <devang dot patel at gmail dot com>
- Cc: "Ira Rosen" <IRAR at il dot ibm dot com>, gcc at gcc dot gnu dot org, "Sa Liu" <SALIU at de dot ibm dot com>
- Date: Fri, 02 Mar 2007 13:10:58 -0500
- Subject: Re: vcond implementation in altivec
- References: <OFD5CD4AE9.BA1C9DC9-ONC225728F.002AE335-C225728F.002C39A6@il.ibm.com> <352a1fb20702270849h262500c3r36401ea9d0bbbc54@mail.gmail.com>
>>>>> Devang Patel writes:
>> Is there a reason why op0 is V4SF
Devang> It is destination so, yes this is wrong.
>> and op1 is V4SI (and not V8HI)?
Devang> condition should be v4si, but it is not op1. So this is also not correct.
>> And also, why not use if_then_else instead of unspec (in all vcond's)?
Devang> I did not try that path. May be I did not know about it at that time.
Patches welcome.
David