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I have found another case where a zero / sign extend is inhibiting optimization> I'm not immediately aware of too many cases where lowering the IL is > going to expose new opportunities to track and optimize nonzero/zero > bits stuff.
Bitfield are the big one. If you have both bitfield and logical operations, you can often merge the logical operations with those used to retrieve and/or store the field.
Things such as
x.y |= 1;
where Y is a bitfield and X non-BLKmode would be a large sequence of logical operations that can all be replaced by a single OR insn at the RTL level but presents no optimization opportunities at the tree level.
extern char b;
extern char c;
int main()
{b <<= 1; b <<= 1; b <<= 1; c = b;
return 0; }
Here again a zero extend gets generated after every 'ashift' whereas we are interested only in the lower order 8 bits. However when i try the same thing with int instead of char i.e. there is no need for extension then the operations get converted into b<<=3 instead of 3 instructions. regards, Pranav
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