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PowerPC code gen question
- From: Michael Eager <eager at eagercon dot com>
- To: GCC <gcc at gcc dot gnu dot org>
- Date: Thu, 16 Nov 2006 15:50:12 -0800
- Subject: PowerPC code gen question
rs6000.c contains the following:
rs6000_hard_regno_mode_ok (int regno, enum machine_mode mode)
{
. . .
/* The float registers can only hold floating modes and DImode. */
if (FP_REGNO_P (regno))
return
(GET_MODE_CLASS (mode) == MODE_FLOAT
&& FP_REGNO_P (regno + HARD_REGNO_NREGS (regno, mode) - 1))
|| (GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_SIZE (mode) == UNITS_PER_FP_WORD);
. . .
Can someone explain to me why FP regs should contain int values?
Is this to support the fcfid conversion instruction?
(define_insn "floatdidf2"
[(set (match_operand:DF 0 "gpc_reg_operand" "=f")
(float:DF (match_operand:DI 1 "gpc_reg_operand" "*f")))]
"TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
"fcfid %0,%1"
[(set_attr "type" "fp")])
What keeps FP regs from being used to contain integer values?
--
Michael Eager eager@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077