Abt RTL expression - combining instruction

["Rohit Arul Raj" <rohitarulraj at gmail dot com>]

Hi all,

I am trying to combine the compare and branch instruction. But my
instructions are not getting generated as my operands are not matched
properly.

Previously for individual compare instructions, i had
operand 0 - Register operand
operand 1 - Non memory operand.

For branch instruction,
operator 0 - compare operator
operand 1 - label.

So when i combined compare and branch, i just superimposed both
statements with same conditions with
operand 0 - Register operand
operand 1 - Non memory operand
operator 2 - comparison operator
operand 3 - label.

1. Is it the right way to match operands and operators while combining
instruction?
2. How to check where my instruction matching goes wrong?

regards
Rohit
-------------------------------------------
> Thanks for finally giving the complete program and the RTL.
>
> I think you said earlier that this is a private target, not a standard
> gcc target.  On that basis, I would say that the problem appears to be
> that you have a cc0 machine of a type which gcc does not handle
> naturally.
>
> If your comparison instructions set a fixed hard register, and simple
> register to register moves clobber that hard register, then you must
> handle comparison instructions specially before reload.  You must emit
> a combined compare_and_branch instruction, which does the comparison
> and the branch in a single insn.  Then you may write a define_split
> which runs after reload and splits the instruction back into its
> components for the second scheduling pass.
>
> You've encountered a somewhat subtle way in which gcc fails if you
> don't do this.  There a much more obvious it will fail: reload will
> wind up clobbering the condition register every time it has to load or
> store a register.
>
> Writing the patterns to avoid using the fixed condition register
> before reload is tedious but typically not difficult.  Writing the
> define_splits which run after reload is typically more complicated.
> Note that in general the define_splits are only useful if scheduling
> helps your processor.
>
> The C4X is an example of a standard target which has some of these
> issues.
>
> (In fairness I should say that there is an alternative, which is to
> use (cc0) for the condition register.  But I do not recommend this, as
> support for (cc0) may be removed from the compiler at some point in
> the future.)
>
> Ian