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Re: PowerPC FPU support
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Michael Eager <eager at eagercon dot com>
- Cc: GCC <gcc at gcc dot gnu dot org>
- Date: Fri, 18 Aug 2006 15:26:21 -0400
- Subject: Re: PowerPC FPU support
- References: <44E6129E.firstname.lastname@example.org>
>>>>> Michael Eager writes:
Michael> I'm adding support to GCC for a different PPC floating point unit.
Michael> It's similar to the standard PPC FPU in that it supports most of
Michael> the same instructions and all operation are in FP registers.
Michael> The FPU comes in a single-precision and double-precision variant.
Michael> There's also an option of having no FPU.
Michael> Rather than creating yet another configuration with another
Michael> TARGET_<whatever> definition and creating ever more cluttered
Michael> condition expression, I've thought to replace TARGET_FPRS with
Michael> TARGET_FPRS_SINGLE and TARGET_FPRS_DOUBLE. These would both have
Michael> the value 1 for standard PPC, and 1 or 0 depending on whether the
Michael> single-or double-precision FPU was available, as specified by a new
Michael> option -mfpu=. There would be some added instruction patterns
Michael> for the single-precision operations.
I think you want to look at TARGET_HARD_FLOAT, not TARGET_FPRS.
TARGET_FPRS was added for Motorola e500 that has FP in GPRs.