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gcc modifications for an arm architecture


I need to make the following change to gcc:
 - Once every 7 assembler instructions , I need to
generate a nop. ( for each cache block insert a nop
).My whole code (statically linked) needs to have this
so I also need to insert the noops for the entire
libc.
Inserting the nops in the asm code does not work,
because will cause some offets to go out of range.
Inserting the nops in the rtl list can only be done
before the dataflow analysis step for the same reason.
I also do not know how to keep the final statically
linked code well alligned.

Can anyone help ? any suggestions would be
appreciated. 

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