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Re: Modifying ARM code generator for elimination of 8bit writes - need help

On Sun, Jun 04, 2006 at 12:31:08PM +0200, Wolfgang Mües wrote:
> Hello Rask,
> On Friday 02 June 2006 09:24, Rask Ingemann Lambertsen wrote:
> > There may be a faster way of seeing if the modification is going to
> > work for the DS at all. I noticed from the output template
> > "swp%?b\\t%1, %1, [%M0]" that "swp" takes three operands. I don't
> > know ARM assembler, but you may be able to choose to always clobber a
> > specific register. Make it a fixed register (see FIXED_REGISTERS),
> > refer to this register directly in the output template and don't add
> > a clobber to the movqi patterns. IMHO, that's an acceptable hack at
> > an experimental stage. If the resulting code runs correctly on the
> > DS, you can then undo the FIXED_REGISTERS change and add the clobber
> > statements.
> I have tried this. No luck. Problem is the lack of addressing modes for 
> the swp instruction. Only a simple pointer in a register (no offset, no 
> auto-increment is allowed).

What about the "Q" constraint? From gcc/config/arm/
"In ARM state an address that is a single base register." Reload knows how
to fix up addresses in a number of cases that happen often, and I believe
this is one of them.

> Hmmm... wondering who all these xxx_operand functions are defined, and 
> where they are documented...

They are documented in section "Machine-Independent Predicates" of the
manual. I haven't checked where they are defined, but 

	grep -e '^.*_operand_p' -e '^.*_address_p' gcc/*.c

should tell you where. Note that strict_memory_address_p() is just a special
case of memory_address_p() which checks for specific hard registers as
base/index registers if the target has such requirements. This is used
starting with the reload pass.

> Is this the right way to go?

I'm pretty sure it is best to have one insn pattern with several
alternatives. Reload might change the instruction enough that it ends up
using a different alternative. For example, using a register alternative for
a constant operand because the constant isn't a valid immediate operand.

Rask Ingemann Lambertsen

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