This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: Why the V4QImode vector operations are expanded into many SImode at "oplower" pass?
- From: "Ling-hua Tseng" <uranus at it dot muds dot net>
- To: Paolo Bonzini <bonzini at gnu dot org>
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 18 May 2005 23:42:53 +0800
- Subject: Re: Why the V4QImode vector operations are expanded into many SImode at "oplower" pass?
- References: <000301c55bbb$c896dfb0$0201a8c0@uranus> <d6fmnv$37j$1@sea.gmane.org>
On Wed, 18 May 2005 17:25:35 +0200, Paolo Bonzini wrote
> > Now I'm implementing the V4QI SIMD add operation.
>
> Maybe there is no register that can store a V4QI.
>
> Paolo
Doesn't the register allocation pass perform in the RTL optimization passes?
Could it affect the tree-level optimization pass?
BTW,
I have tried to adjust the constraints to 'r' (general registers) for
the "movv4qi" and "addv4qi" insn patterns,
but I got the same problem.
Thanks.