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Re: AVR indirect_jump addresses limited to 16 bits
- From: Paul Schlie <schlie at comcast dot net>
- To: Marek Michalkiewicz <marekm at amelek dot gda dot pl>
- Cc: <gcc at gcc dot gnu dot org>
- Date: Sat, 19 Mar 2005 13:51:05 -0500
- Subject: Re: AVR indirect_jump addresses limited to 16 bits
> Marek Michalkiewicz wrote:
> I'm looking into adding support for ATmega256x and larger devices to
> the AVR port. This means that program memory addresses no longer fit
> in 16 bits - and I'm looking how to avoid making pointers larger.
- Fully agree, just can't keep from wondering if this may be most
efficiency accomplish by simply requiring the alignment of all
function entry points to be two instruction word aligned. Thereby
although there will be some more inefficiency than otherwise required
for code mapped @ <64K; apps with even as many as 1K or so functions
(which is likely a lot for even large avr apps), it would only imply
a worst-case inefficiency of 1K instruction words, but likely averaging
closer to 500 words, which seems like a small price to pay for an
additional 64K words of program space. (and would likely less than the
corresponding overhead of having to thread function entries to their
bodies otherwise).
Thereby all function address pointers simply first set the extended
code address register bit to the logical high order address bit of the
16-bit code pointer. which technically is likely best physically mapped
into the low-order bit of the function pointer so that it does not need
to cleared prior to use (effectively implying that function entries <64K
are aligned to even word addresses, and those >64K are aligned to odd word
address.
(no jump tables, etc, required)
???