This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

i386: unrecognized insn - "andhi3" pattern


Hello!

It looks there is a bug in "andhi3" patterns, probably in constraints to *andhi_1 pattern. I would like to generate assembler instruction "andw $XXXX, %ax". However, if I use following code in i386.c:
rtx reg = gen_reg_rtx (HImode);
...
emit_insn (gen_andhi3 (reg, reg, GEN_INT (0xf3ff)));


an error is produced:
--cut_here--
int.c:7: error: unrecognizable insn:
(insn 32 31 33 0 (parallel [
           (set (reg:HI 68)
               (and:HI (reg:HI 68)
                   (const_int 62463 [0xf3ff])))
           (clobber (reg:CC 17 flags))
       ]) -1 (nil)
   (expr_list:REG_UNUSED (reg:CC 17 flags)
       (expr_list:REG_UNUSED (reg:CC 17 flags)
           (nil))))
int.c:7: internal compiler error: in extract_insn, at recog.c:2037
--cut_here--

 There is no problem to generate "orw     $3072, %ax" with:
      rtx reg = gen_reg_rtx (HImode);
      ...
      emit_insn (gen_iorhi3 (reg, reg, GEN_INT (0x0400)));

I have noticed, that constraints are different for "*iorhi_1" and "*andhi_1". Is there everything OK with constraints for andhi_1 ? If constraints are OK, how to generate an "andw $XXXX, %ax" instruction?

Thanks for help,
Uros.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]