This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
RE: Inline functiion in GCC
- From: Richard Earnshaw <rearnsha at gcc dot gnu dot org>
- To: jeroen dobbelaere <jeroen dot dobbelaere at acunia dot com>
- Cc: venkatu at samsung dot com, gcc at gcc dot gnu dot org
- Date: Fri, 06 Aug 2004 12:51:09 +0100
- Subject: RE: Inline functiion in GCC
- Organization: GNU
- References: <41136DE9.1010200@acunia.com>
On Fri, 2004-08-06 at 12:39, jeroen dobbelaere wrote:
> Hi Venkatachala Upadhya,
>
> Your inline problem would probably work better if you would add optimization when compiling.
> (-O2 for example).
>
> I've changed your example into the following :
> The assembly function was changed in such way, that gcc can reorder
> instructions at will.
>
>
>
> #include <stdio.h>
> #include <stdlib.h>
>
> __inline__ static int add(int x, int y)
> {
> __asm__
> (
> "qadd %0, %1, %2 \n;"
> : "=r" (x)
> : "0" (x << 16), "r" (y << 16)
>
No need to tie the input register to the output:
__inline__ static int add(int x, int y)
{
__asm__ __volatile__
(
"qadd %0, %1, %2"
: "=r" (x)
: "r" (x << 16), "r" (y << 16)
) ;
return (x >> 16);
}
> 00000000 <main>:
> 0: e3a00705 mov r0, #1310720 ; 0x140000
> 4: e1a02000 mov r2, r0
Beep: redundant move, caused by that register tie...
> 8: e3a0381e mov r3, #1966080 ; 0x1e0000
> c: e3a0180a mov r1, #655360 ; 0xa0000
> 10: e1032052 qadd r2, r2, r3
> 14: e1001051 qadd r1, r1, r0
> 18: e1a01841 mov r1, r1, asr #16
> 1c: e1a02842 mov r2, r2, asr #16
> 20: e1a00802 mov r0, r2, lsl #16
> 24: e1a03801 mov r3, r1, lsl #16
> 28: e1003053 qadd r3, r3, r0
> 2c: e59f0004 ldr r0, [pc, #4] ; 38 <main+0x38>
> 30: e1a03843 mov r3, r3, asr #16
> 34: eafffffe b 0 <main>
> 38: 00000000 andeq r0, r0, r0
>
>
main:
mov r1, #655360
mov r2, #1310720
qadd r1, r1, r2
mov r3, #1966080
mov r1, r1, asr #16
qadd r2, r2, r3
mov r2, r2, asr #16
mov r3, r1, asl #16
mov r0, r2, asl #16
qadd r3, r3, r0
ldr r0, .L2
mov r3, r3, asr #16
b printf