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Re: MD representation of IA64 floating point operations
Jim Wilson <wilson@specifixinc.com> writes:
> If you want to support the full generality of what the hardware
> implements, then you will probably have to add some machine independent
> support for this. You are implementing something that gcc doesn't
> already support, because there probably aren't any other targets that
> support this. I pointed at one possible solution, which is the
> se_register_operand stuff in the gcc-3.3 mips port. Another possible
> solution is modeless patterns, perhaps with predicates that check the
> operand mode instead of relying on the mode parameter. Or maybe a new
> kind of operator that can accept multiple modes.
I don't have 3.3 to hand and I'm too tired right now to experiment,
but it occurred to me that it might work to have an input- operand
predicate that accepted (float_extend:M (reg:N ...)) as well as
(reg:M ...). Is that the sort of thing that se_register_operand was
doing?
zw