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Re: IEEE extended real formats

From: Robert Dewar <dewar at gnat dot com>
To: Zack Weinberg <zack at codesourcery dot com>
Cc: gcc at gcc dot gnu dot org
Date: Tue, 15 Jun 2004 01:37:38 -0400
Subject: Re: IEEE extended real formats
References: <873c4x32cz.fsf@taltos.codesourcery.com>

Zack Weinberg wrote:

For the ia64, this is expected to be embedded in an 128-bit memory
block with all the padding at higher addresses, in *both*
endiannesses:

   SEEE MMMM MMMM MMMM MMMM 0000 0000 0000
   MMMM MMMM MMMM MMMM ESSS 0000 0000 0000

What I'm not clear on is where the x86 expects the padding.  The
manuals, even the most recent, simply say "extended-real values are
stored in 10 consecutive bytes."  But this is always embedded in an
12- or 16-byte block, so I do not know what to do.  Can anyone
comment?


The x86 is identical to the ia64 in little endian (there is no
big endian in the x86 case certainly!) the padding is not seen
by the processor, since it is after the 10 bytes that are relevant.

zw

References:
- IEEE extended real formats
  - From: Zack Weinberg

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