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Re: VLIW pack and DFA scheduler:Register sharing question
- From: <tm_gccmail at kloo dot net>
- To: mike at csdn dot sign dot idv dot tw
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 26 May 2004 03:07:09 -0700 (PDT)
- Subject: Re: VLIW pack and DFA scheduler:Register sharing question
On Tue, 25 May 2004 mike@csdn.sign.idv.tw wrote:
...
> following situitaion?
>
> add %r1,$24
> add %r1,$28
>
> If the two asm instruction execute parallelly, the result
> of r1 could not be known.
As far as I know, no.
The DFA scheduler does not do guarantee certain restrictions. It assumes
an interlocked pipelined processor where resource contention results in
pipeline stalls, not incorrect data.
> Could DFA scheduler automatically prevent this situiation?
No.
> OR I have to add some codes to prevent this?
Yes, probably in machine-depedent reorg.
> Please help. Thanks very much.
>
>
> Mike Wu
Toshi