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Re: Write a md about a cpu having a risc unit and a dsp unit
- From: Paul Brook <paul at codesourcery dot com>
- To: gcc at gcc dot gnu dot org
- Cc: mike at csdn dot sign dot idv dot tw
- Date: Tue, 25 May 2004 13:01:12 +0100
- Subject: Re: Write a md about a cpu having a risc unit and a dsp unit
- Organization: CodeSourcery
- References: <20040525060130.GA11616@csdn.sign.idv.tw>
On Tuesday 25 May 2004 07:01, firstname.lastname@example.org wrote:
> I am going to write a machine description for a cpu having a risc
> unit and a dsp unit.
> The risc unit and dsp unit have their own register file.
> When using dsp instrcutions, the risc unit has to load the data
> from the main memory to dsp registers (using "load" instruction).
> And when the dsp unit processed the instruction, the risc unit uses
> "store" instruction to store the data back to the main memory.
> Any idea how to describe this in the machine description?
Several existing targets have similar requirements for floating point
coprocessors. You might want to take a look at eg. the machine descriptions
for the arm fpa or maverick coprocessors.