This is the mail archive of the mailing list for the GCC project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: RFC: generic vectors and GPR/simd duality

On Wed, May 12, 2004 at 11:54:39AM -0400, Aldy Hernandez wrote:
> On Wed, May 12, 2004 at 11:49:49AM -0400, Daniel Jacobowitz wrote:
> > On Wed, May 12, 2004 at 10:58:00AM -0400, Aldy Hernandez wrote:
> > > mode_multiple from V2SI to V4SI is 2, whereas nregs_multiple is 4.
> > > GPR #26 can hold a V2SI in just one register, but needs 4 for a V4SI.
> > > In other architectures, a given SIMD register can hold only one type
> > > of simd, whereas the e500 can hold any (albeit in subsequent registers
> > > for anything not V2SI).  Confusion.
> > 
> > Why does V4SI take four GPRs, that's the question.  If you treat them
> > as V2SI registers GCC ought to be able to synthesize the V4SI as two
> > V2SIs.  It might be as simple as "fixing" HARD_REGNO_NREGS... probably
> > not, though.
> Shudder.  I can almost guarantee you that that's going to create all
> sorts of havoc.  I'm willing to give it a whirl, but watch the pain...

My brain hurts.

When I change HARD_REGNO_NREGS, reload does some gymnastics of mode
changing, ending up with:

(subreg:SI (reg:V4SI 11 11) 0)

Now, SI is 32 bits.  V4SI is 128 bits.  But HARD_REGNO_NREGS now
returns 2 for a V4SI.  You can imagine the confusion wrought by all

The more I think about it, the more I want to remove the creation of
the subregs in the first place.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]