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Re: rs6000.md/altivec.md problem in setting of vector registers
- From: Dale Johannesen <dalej at apple dot com>
- To: Dorit Naishlos <DORIT at il dot ibm dot com>
- Cc: gcc at gcc dot gnu dot org, David Edelsohn <dje at makai dot watson dot ibm dot com>, Dale Johannesen <dalej at apple dot com>
- Date: Fri, 19 Mar 2004 10:55:23 -0800
- Subject: Re: rs6000.md/altivec.md problem in setting of vector registers
- References: <OF6E029669.0E5E3F05-ONC2256E5C.000482C4-C2256E5C.0004D314@il.ibm.com>
On Mar 18, 2004, at 4:52 PM, Dorit Naishlos wrote:
I managed to hack something that causes Reload to make the "right"
decision
and generate the same code as it generates for i386 - i.e., the spill
code
is created out of the loop.
The hack modifies the macro CANNOT_CHANGE_MODE_CLASS in rs6000.h to not
allow a mode change from a vector mode to a smaller mode in
ALTIVEC_REGS or
GENERAL_REGS. As a result, these register classes cannot be considered
for
allocation in this case; instead, Reload directly creates stores to
memory,
outside the loop, like for i386.
I haven't tried it, but this might well break passing of vector
parameters in int regs.