This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: locking problem with mips atomicity


On Mon, Mar 15, 2004 at 03:57:02PM -0800, Michael Eager wrote:
> -       "ll	%0,%3\n\t"
> -       "addu	%1,%4,%0\n\t"
> -       "sc	%1,%2\n\t"
> +       "la      %3,%2\n\t"
> +       "ll	%0,0(%3)\n\t"
> +       "addu	%1,%5,%0\n\t"
> +       "sc	%1,0(%3)\n\t"
>         ".set	pop\n\t"
>         "beqz	%1,1b\n\t"
>         "/* End exchange & add */"
> -       : "=&r"(__result), "=&r"(__tmp), "=m"(*__mem)
> +       : "=&r"(__result), "=&r"(__tmp), "=m"(*__mem), "=r" (temp)

Better is to make the compiler force the address into a register.
It may already be that way, resulting in "la r3,0(r4)".


r~


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]