Re: locking problem with mips atomicity

[Michael Eager <eager at mvista dot com>]

Phil Edwards wrote:
> 
> Things dealing with libstdc++-v3 should also be sent to that list.

Thanks.

> 
> I'll leave the guts of the patch to a MIPS maintainer to approve, but here
> are some things you'll need to change:
> 
> > -    _Atomic_word __result, __tmp;
> > +    _Atomic_word __result, __tmp, temp;
> 
> The name must have two leading underscores, so it would have to be __temp,
> not temp.  Likewise for the second function.
> 
> Please consider renaming these to something more descriptive.  We know
> they're temporary.  :-)  We don't know what they're used for without
> studying the assembly.  (Feel free to rename tmp as well.)

Renamed temp to __addr, which should be more descriptive.  Renamed __tmp
to __sum, since it is the sum of the __mem value and __val.

Also added a changelog entry, which I'd forgotten.

> > +       "la      %3,%2\n\t"
> > +       "ll   %0,0(%3)\n\t"
> > +       "addu %1,%5,%0\n\t"
> > +       "sc   %1,0(%3)\n\t"
> 
> Watch the extra space in the first line.  (Might as well get the cosmetic
> aspects right from the beginning.)

Replaced spaces with a tab.

--
Michael Eager     eager@mvista.com	408-328-8426	
MontaVista Software, Inc. 1237 E. Arques Ave., Sunnyvale, CA  94085

2004-03-10  Michael Eager  <eager@mvista.com>

	* libstdc++-v3/config/cpu/mips/atomicity.h:  Prevent reg
	loads between LL and SC instructions.

Index: libstdc++-v3/config/cpu/mips/atomicity.h
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/mips/atomicity.h,v
retrieving revision 1.9
diff -u -r1.9 atomicity.h
--- libstdc++-v3/config/cpu/mips/atomicity.h	27 Feb 2004 00:49:48 -0000	1.9
+++ libstdc++-v3/config/cpu/mips/atomicity.h	15 Mar 2004 23:55:31 -0000
@@ -35,7 +35,7 @@
   __attribute__ ((__unused__))
   __exchange_and_add(volatile _Atomic_word* __mem, int __val)
   {
-    _Atomic_word __result, __tmp;
+    _Atomic_word __result, __sum, __addr;
     
     __asm__ __volatile__
       ("/* Inline exchange & add */\n\t"
@@ -44,13 +44,14 @@
 #if _MIPS_SIM == _ABIO32
        ".set	mips2\n\t"
 #endif
-       "ll	%0,%3\n\t"
-       "addu	%1,%4,%0\n\t"
-       "sc	%1,%2\n\t"
+       "la	%3,%2\n\t"
+       "ll	%0,0(%3)\n\t"
+       "addu	%1,%5,%0\n\t"
+       "sc	%1,0(%3)\n\t"
        ".set	pop\n\t"
        "beqz	%1,1b\n\t"
        "/* End exchange & add */"
-       : "=&r"(__result), "=&r"(__tmp), "=m"(*__mem)
+       : "=&r"(__result), "=&r"(__sum), "=m"(*__mem), "=r" (__addr)
        : "m" (*__mem), "r"(__val));
     
     return __result;
@@ -60,7 +61,7 @@
   __attribute__ ((__unused__))
   __atomic_add(volatile _Atomic_word* __mem, int __val)
   {
-    _Atomic_word __result;
+    _Atomic_word __result, __addr;
     
     __asm__ __volatile__
       ("/* Inline atomic add */\n\t"
@@ -69,13 +70,14 @@
 #if _MIPS_SIM == _ABIO32
        ".set	mips2\n\t"
 #endif
-       "ll	%0,%2\n\t"
-       "addu	%0,%3,%0\n\t"
-       "sc	%0,%1\n\t"
+       "la	%2,%1\n\t"
+       "ll	%0,0(%2)\n\t"
+       "addu	%0,%4,%0\n\t"
+       "sc	%0,0(%2)\n\t"
        ".set	pop\n\t"
        "beqz	%0,1b\n\t"
        "/* End atomic add */"
-       : "=&r"(__result), "=m"(*__mem)
+       : "=&r"(__result), "=m"(*__mem), "=r" (__addr)
      : "m" (*__mem), "r"(__val));
   }
 } // namespace __gnu_cxx