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Re: Clarification Req: Regarding "+m" constraints in inline asm

From: Jim Wilson <wilson at specifixinc dot com>
To: "Ashok.A" <ashok_kumar_ak at yahoo dot com>
Cc: gcc at gcc dot gnu dot org
Date: Thu, 04 Mar 2004 12:45:19 -0800
Subject: Re: Clarification Req: Regarding "+m" constraints in inline asm
References: <20040303144417.86368.qmail@web12005.mail.yahoo.com>

Ashok.A wrote:

I need clarification regarding the "+m" constraints.
I heard that "+m" constraints cannot be used
in "inline asm". Is it true?

Current sources will give a warning for both of your examples. Neither read-write "+" or matching "1" constraints should be used with mems in an asm. These both require that the operands are the same, but the compiler is not able to guarantee this for mems. We can only make this work for register constraints.

Try changing the lw to use %2 instead of %1, and then use "m" for the second operand. I think this is the way it is supposed to work nowadays. -- Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com

Follow-Ups:
- Clarification Req: Regarding "memory" clobber for cache operation is required (?)
  - From: Ashok.A

References:
- Clarification Req: Regarding "+m" constraints in inline asm
  - From: Ashok.A

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