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Re: Floating point registers vs. LOAD_EXTEND_OP on alpha
Richard Henderson <firstname.lastname@example.org> writes:
> On Mon, Jan 19, 2004 at 08:32:52PM +0000, Joern Rennecke wrote:
>> I could check
>> CANNOT_CHANGE_MODE_CLASS (GET_MODE (op), word_mode,
>> REGNO_REG_CLASS (REGNO (SET_DEST (set)))) ,
>> but there is similar code in reload_cse_simplify_set that would also
>> need to be changed, and we'd have to document that LOAD_EXTEND_OP
>> does not apply to hard registers whose reg class cannot change to
>> word_mode or any integral integer mode between the mode of the
>> memory reference and word_mode.
> Don't bother. I've just fixed the backend to not accept SImode
> values in FP registers at all. As Kenner said upthread, we've
> seen problems with this in the past; your change was just the
> straw that broke the camel's back.
Well, the same problem applies to MIPS as well. We specifically
include FP_REGS in C_C_M_C for this very reason.
Or should MIPS be changed in the same way as alpha? (Pretty ironic if so,
since we used for forbid SImode values in FPRs, but I changed that under
advice that this shouldn't be a problem. ;)
On the other hand, what's the point of having CANNOT_CHANGE_MODE_CLASS
if post-reload passes are allowed to change the mode of a register like
this? Unextended registers aren't the only thing that could go wrong on
MIPS if you ignore the macro. E.g. the HI/LO registers are always
ordered that way round, even on little-endian systems. I know it
should be changed, but ISTR other ports have similar warts...
FWIW, before Joern's change, I haven't seen any problems with FPRs
being incorrectly treated as sign-extended. I haven't yet tested
after the patch.