2003-10-29 James E Wilson * expmed.c (store_bit_field): New local fieldmode_bitsize. Use instead of GET_MODE_BITSIZE (fieldmode). Change size test back to equality tests. (extract_bit_field): For full register case, change size test back to equality test. Use GET_MODE_SIZE instead of GET_MODE_BITSIZE. Index: expmed.c =================================================================== RCS file: /cvs/gcc/gcc/gcc/expmed.c,v retrieving revision 1.145 diff -p -r1.145 expmed.c *** expmed.c 25 Oct 2003 23:14:14 -0000 1.145 --- expmed.c 30 Oct 2003 06:23:10 -0000 *************** store_bit_field (rtx str_rtx, unsigned H *** 287,292 **** --- 287,296 ---- = (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD; unsigned HOST_WIDE_INT offset = bitnum / unit; unsigned HOST_WIDE_INT bitpos = bitnum % unit; + /* We can't use GET_MODE_BITSIZE here, because we need the size not the + precision. This matters for XFmode on IA-64. */ + unsigned HOST_WIDE_INT fieldmode_bitsize + = GET_MODE_SIZE (fieldmode) * (unsigned) BITS_PER_UNIT; rtx op0 = str_rtx; int byte_offset; *************** store_bit_field (rtx str_rtx, unsigned H *** 326,349 **** If the target is memory, storing any naturally aligned field can be done with a simple store. For targets that support fast unaligned ! memory, any naturally sized, unit aligned field can be done directly. ! ! It's okay if the requested bitsize is greater than fieldmode's ! bitsize; that just means the mode has padding bits. */ byte_offset = (bitnum % BITS_PER_WORD) / BITS_PER_UNIT + (offset * UNITS_PER_WORD); if (bitpos == 0 ! && GET_MODE_BITSIZE (fieldmode) != 0 ! && bitsize >= GET_MODE_BITSIZE (fieldmode) && (GET_CODE (op0) != MEM ? ((GET_MODE_SIZE (fieldmode) >= UNITS_PER_WORD || GET_MODE_SIZE (GET_MODE (op0)) == GET_MODE_SIZE (fieldmode)) && byte_offset % GET_MODE_SIZE (fieldmode) == 0) : (! SLOW_UNALIGNED_ACCESS (fieldmode, MEM_ALIGN (op0)) || (offset * BITS_PER_UNIT % bitsize == 0 ! && MEM_ALIGN (op0) % GET_MODE_BITSIZE (fieldmode) == 0)))) { if (GET_MODE (op0) != fieldmode) { --- 330,349 ---- If the target is memory, storing any naturally aligned field can be done with a simple store. For targets that support fast unaligned ! memory, any naturally sized, unit aligned field can be done directly. */ byte_offset = (bitnum % BITS_PER_WORD) / BITS_PER_UNIT + (offset * UNITS_PER_WORD); if (bitpos == 0 ! && bitsize == fieldmode_bitsize && (GET_CODE (op0) != MEM ? ((GET_MODE_SIZE (fieldmode) >= UNITS_PER_WORD || GET_MODE_SIZE (GET_MODE (op0)) == GET_MODE_SIZE (fieldmode)) && byte_offset % GET_MODE_SIZE (fieldmode) == 0) : (! SLOW_UNALIGNED_ACCESS (fieldmode, MEM_ALIGN (op0)) || (offset * BITS_PER_UNIT % bitsize == 0 ! && MEM_ALIGN (op0) % fieldmode_bitsize == 0)))) { if (GET_MODE (op0) != fieldmode) { *************** store_bit_field (rtx str_rtx, unsigned H *** 407,413 **** if (GET_CODE (op0) != MEM && (BYTES_BIG_ENDIAN ? bitpos + bitsize == unit : bitpos == 0) ! && bitsize == GET_MODE_BITSIZE (fieldmode) && (movstrict_optab->handlers[(int) fieldmode].insn_code != CODE_FOR_nothing)) { --- 407,413 ---- if (GET_CODE (op0) != MEM && (BYTES_BIG_ENDIAN ? bitpos + bitsize == unit : bitpos == 0) ! && bitsize == fieldmode_bitsize && (movstrict_optab->handlers[(int) fieldmode].insn_code != CODE_FOR_nothing)) { *************** extract_bit_field (rtx str_rtx, unsigned *** 1033,1044 **** if (GET_CODE (op0) == REG && mode == GET_MODE (op0) && bitnum == 0 ! && GET_MODE_BITSIZE (GET_MODE (op0)) != 0 ! && bitsize >= GET_MODE_BITSIZE (GET_MODE (op0))) { ! /* We're trying to extract a full register from itself. ! (If the requested bitsize is greater than the bitsize of op0, ! that just means op0's mode has padding bits.) */ return op0; } --- 1033,1043 ---- if (GET_CODE (op0) == REG && mode == GET_MODE (op0) && bitnum == 0 ! /* We can't use GET_MODE_BITSIZE here, because we need the size not the ! precision. This matters for XFmode on IA-64. */ ! && bitsize == (GET_MODE_SIZE (mode) * (unsigned) BITS_PER_UNIT)) { ! /* We're trying to extract a full register from itself. */ return op0; }