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Re: Inner-loop optimization regression from 3.3 to 3.4
> Richard Henderson <rth@redhat.com> writes:
>
> > On Fri, Oct 17, 2003 at 04:10:02PM +0200, Jan Hubicka wrote:
> > > + /* Convert (a >= 0) into (a >> (bits_per_mode - 1)) != -1. */
> >
> > Comment's wrong.
> >
> > > + if (op1 == const0_rtx && BRANCH_COST > 1)
> > > + {
> > > + nonnegative:
> > > + return expand_simple_binop (GET_MODE (op0), ASHIFTRT, op0,
> > > + GEN_INT (GET_MODE_BITSIZE
> > > + (GET_MODE (op0)) - 1),
> > > + NULL_RTX, 1, OPTAB_DIRECT);
> >
> > Overall this looks reasonable. It does however need to check rtx
> > costs a lot more. On Alpha for instance, LT is 2 to 6 times cheaper
> > than ASHIFTRT, depending on how you count costs.
>
> Maybe it's easier to do that in the machine description, that way it
> gets also optimized if the user explicitely specified x >> 63. For
> example:
Hmm, some alternate place for this would be very plausible. This can be
done in generic code based on RTL_COST. Perhaps expand_simple_binop can
know about it or we can teach simplify_rtx about the transfomration,
build the shift and call simplify_rtx followed by force_operand. Better
ideas?
Honza
>
> Index: alpha.md
> ===================================================================
> RCS file: /cvsroot/gcc/gcc/gcc/config/alpha/alpha.md,v
> retrieving revision 1.213
> diff -u -p -r1.213 alpha.md
> --- alpha.md 27 Sep 2003 04:48:12 -0000 1.213
> +++ alpha.md 19 Oct 2003 09:52:21 -0000
> @@ -1421,6 +1421,14 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi
> }
> [(set_attr "type" "iadd")])
>
> +(define_insn "*lshrdi3_63"
> + [(set (match_operand:DI 0 "register_operand" "=r")
> + (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
> + (const_int 63)))]
> + ""
> + "cmplt %r1,0,%0"
> + [(set_attr "type" "icmp")])
> +
> (define_insn "lshrdi3"
> [(set (match_operand:DI 0 "register_operand" "=r")
> (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
>
> --
> Falk